Skills/Role
Solid CMOS background required. Preferably strong connectivity (WiFi, GPS and Bluetooth) experience.
Description/requirements
Hands on experience of top level designs of complex multi-block RFICs and embedded RF blocks
The chip/project lead must be able to lead and supervise the project team members
Experience in driving specification and definition of complex RFICs
Experience of leading the test and debug efforts for products
Cadence based design background with solid knowledge of layout and front to back flow for RFICs using the latest design tools
Clear understanding and knowledge of integrated radio architectures, functions, and performance parameters
Experience in the complete design flow, simulation and verification (using appropriate design tools) of top level designs that include digital, mixed signal, and RF blocks as well as package and PCB models.
Kind Regards,
Sam Noble – Senior Consultant – Technology
E: s.noble@eurostaffgroup.com T: 00 44 20 7803 0606
M: 00 44 7817 247 385
W: www.eurostaffgroup.com A: 135 Park Street, London SE1 9EA
LONDON 00 44 20 7803 0606 | DÜSSELDORF 00 49 211 882 31 606 | BRUSSELS 00 32 2401 6870
MUNICH 00 49 89 2889 0374 | AMSTERDAM 00 31 2052 07583 | ZURICH 00 41 4430 73762
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